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Altera_Forum's avatar
Altera_Forum
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16 years ago

How to finish the altpciechdma.c driver?

I've downloaded the altpciechdma.c driver for the Altera Arria GX dev kit. The char part of it is not yet finished (due to the comments). And a module is missign "mapper_user_to_sg.h". Smb has...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Sorry for my late reply,

the parameter I mention is located on the VHDL/Verilog design. I am not aware if it is possible to access it from Qsys.

I hope it solved any doubt on your design.

Anyway, good luck and patience.