Forum Discussion
Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- Thank you Kaz for your time :) **p.s. I need to write d_in into mem_array[Q] so that i can keep track on its location right? **another way i found something: "develop a verilog model for a peak detector that finds the maximum value in a sequence of 10-bit unsigned integers. a new number arrives at the input during a clock cycle when the data_en input is 1. if the new number is greater than the previously stored maximum value, the maximum value is updated with the new number; otherwise, it is unchanged. the stored maximum value is cleared to zero when the reset control input is 1. both data_en and reset are synchronous control inputs." --- Quote End --- What another way? It is same one I am telling you since last year!! and your code : why do you keep using the wrong signal name: why do you use max_val_tmp, I did not say that.