How to enable SDRAM ECC in the Qsys

I assume you are talking about the HPS SDRAM (which is different from the FPGA SDRAM). For HPS SDRAM, navigate to the HPS Qsys Component --> SDRAM tab --> Memory Parameters

If you are using 32-bit interface width, put the number "40" here. In the Qsys Message box, you should see the note:

Info: soc_system.hps_0: ECC will be enabled in the preloader because an interface width of 24 or 40 has been chosen.