How to display 4 numbers on 7 segmnet in verilog

Hi everybody!

I'm write a program to display 4 number(6,7, 8,9) on 7seg of Cyclone III FPGA Development Board its image here (http://www.altera.com/products/devkits/altera/kit-cyc3.html)

My purpose is to display 4 numbers(6,7,8,9) on board. But I only can display

all 4 numbers that only 1 number 9.

I tried many methods but the result could display as I could.

EVERYBODY HELP ME IN VERILOG?

HOW I CAN DISPLAY 4 NUMBERS ON 4 SEGMENT?

My code:

module Led (clkin_50,cpu_resetn,m1,m2,m3,m4,a,b,c,d,e,f, g,dp);

input clkin_50, cpu_resetn;

reg [3:0] state;

reg [6:0] number;

output m1, m2, m3, m4, a, b, c, d, e, f, g, dp;

assign {m4, m3, m2, m1} = state;

assign {a, b, c, d, e, f, g} = number;

assign dp = 1;

always @ (posedge clkin_50)

if (cpu_resetn == 0)

state <= 4'b0000;

else

state <= 4'b0001;// select a led to display

always @ (posedge clkin_50)

if (cpu_resetn == 0)

number <= 0;

else

number <= 7'b0000100; Display 7 number on 7seg

endmodule