Forum Discussion
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- You didn't say, if you need to operate the DDR cores independently. And no bit width information. Generally, the CIII hardware handbook has an overview of available DDR interface resources with respective maximum speed for row and column banks. --- Quote End --- Thank all replys. Yes, I need two independent DDR cores and the bit-width of them are all 16 bits. I want to sure that I can place the cores in BANK 3,4 and BANK 5,6 respectively?