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Altera_Forum
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Honored Contributorhow to connect analog input directly to FPGA Altera board?
hi;
I want to implement Sigma Delta ADC on Altera DE1, i wrote the code and run on QuartusII; now i want to know is it possible to connect the analog input directly to the board? as in my code the input is introduced as signed [7:0] so my original analog input should be converted to the type signed [7:0] before enter the altera cycloneII core is this conversion possible on the board? at the end how can i get my digital output from the board and analyze it? your guidance is very appreciated. thank you12 Replies
Altera_ForumAlthoug Cylone II has differential LVDS receivers, they don't have a specified common range that would be well suited for the intended purpose. Thus an external comparator would be the preferred solution. On the other hand, I guess that the X competitor's LVDS inputs don't have a considerable better common mode specification and the said eval board SD ADCs rather depend on typical data than specified behaviour.
- Altera_Forum
Thanks Dave; very useful help :)
- Altera_Forum--- Quote Start --- my supervisor asked me to implement Sigma Delta ADC on "Cyclone II DE1" board; now i want to make sure that does circuit mentioned in latticesemi proper for this goal; if i use an analog comparator off chip with RC network; and design other parts of Sigma Delta ADC on FPGA ? --- Quote End --- Yes, you can implement the circuit as shown in the Lattice application note. You could use an external comparator or an external LVDS receiver. An external comparator is better, as it will have a wider input voltage tolerance. Regardless of how you perform your 1-bit A-to-D conversion, you need to make sure you restrict the analog signal swing to whatever the receiver can handle. Cheers, Dave
- Altera_Forum
Thanks Dave;
my supervisor asked me to implement Sigma Delta ADC on "Cyclone II DE1" board; now i want to make sure that does circuit mentioned in latticesemi proper for this goal; if i use an analog comparator off chip with RC network; and design other parts of Sigma Delta ADC on FPGA ? - Altera_Forum--- Quote Start --- I think the example design that FvM recalls is from Lattice Semi http://www.latticesemi.com/products/intellectualproperty/referencedesigns/simplesigmadeltaadc.cfm One of the newer Altera kits (Stratix V or Cyclone V - I forget which one I saw) has a sigma-delta modulator on it from Analog Devices AD7401: http://www.analog.com/en/analog-to-digital-converters/isolated-ad-converters/ad7401/products/product.html If you really wanted to design at this low-level, then you could use this external modulator and implement the digital side in the FPGA. Edit: Here's where I saw the AD7401 ... http://www.altera.com/literature/ds/ds_1038_doc_mc.pdf Cheers, Dave --- Quote End --- I have Altera Cyclone II; and my supervisor ask me to implement ADC on that; so the circuit introduced in latticesemi could be proper i think. Thanks Dave;
- Altera_Forum
I think the example design that FvM recalls is from Lattice Semi
http://www.latticesemi.com/products/intellectualproperty/referencedesigns/simplesigmadeltaadc.cfm One of the newer Altera kits (Stratix V or Cyclone V - I forget which one I saw) has a sigma-delta modulator on it from Analog Devices AD7401: http://www.analog.com/en/analog-to-digital-converters/isolated-ad-converters/ad7401/products/product.html If you really wanted to design at this low-level, then you could use this external modulator and implement the digital side in the FPGA. Edit: Here's where I saw the AD7401 ... http://www.altera.com/literature/ds/ds_1038_doc_mc.pdf Cheers, Dave - Altera_Forum
hi FvM, as i searched cyclonII doesnt have LVDS input; so you mean i should use an analog comparator off chip instead? with RC network. and design other parts of Sigma Delta ADC on FPGA ; such as a circuit i attached?
thank you. - Altera_Forum--- Quote Start --- I want to implement Sigma Delta ADC on Altera DE1, i wrote the code and run on QuartusII; now i want to know is it possible to connect the analog input directly to the board? as in my code the input is introduced as signed [7:0] --- Quote End --- I don't understand the question. A SD ADC would preferably use a 1-bit modulator. Multibit modulators are a principle option in SD design, but they need digital correction and a multibit ADC and DAC to take advantage of the SD principle. See Chapter 8 of delta-sigma data converters, theory, design and simulation, by Schreier et al. I don't believe that you intend to design an analog frontend of similar complexity. I have seen FPGA evaluation boards (from Altera competitors, if I remember right) with a basic first order SD modulator comprised of a RC lowpass and a comparator. The comparator might be even replaced by a LVDS input stage.
- Altera_Forum
thanks a lot for your quick response.
- Altera_Forum
Terasic has an expansion card with ADC/DAC for DE1 board("Highspeed AD/DA Card"). There should be other vendors too.
