how to clear the ram content in one clock?

There is no way to clear all the contents of a RAM. I don't think any FPGA can do that, and it's probably just too expensive silicon-wise. If you really need it, you'll have to do something in logic. Some thoughts:

- Clear every location as you suggested.

- Duplicate the RAM. When you issue an aclr, you really just switch to the other RAM who had it's contents cleared, and your logic then begins clearing the old RAM. As long as you don't issue an aclr less than 1024 clocks apart, that should work.

- Make the RAM one bit wider. Have a toggle register that powers up to 0 and writes to that extra bit. When ever you read from a location, compare the extra bit of the word to the toggle register. If they're equal, use the word, and if they're not make the word all 0s(because it hasn't been written to since the last clear). Whenever you issue a new clear, just toggle the register. (Thinking about it some more, this would only work if you know you're going to write to every location between clears. If not, then a word that hadn't been written to in two clears would now look like it had been written to since the last clear, even though it hadn't.)

Anyway, just some ideas. I'm sure there are more...