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Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- I have tried this with Oscilloscope today, and I found that there was no signal coming out from SMA connectors (only noise). I checked again the board schematic and reference manual. I am not so sure but it looks like I can only drive the reference clocks (dedicated for XCVR channels) out of the board, but not the clock from core. --- Quote End --- If an SMA goes to a REFCLK, that is an input path, not an output. Look on page 11 of the schematic, there are two SMA connectors, IO_CLKOUT1 and IO_CLKOUT2. Page 25 shows where they come from; PLLT1CKO0p/n. Those pins sound like they are a PLL output ... is that what you are using? What about page 9, J18, it comes from U21 (ICS557-03). That should be a clock signal too. I'd recommend using this one, since it will not accumulate PLL jitter from the FPGA. --- Quote Start --- One point I am still confused. I am trying to have a synchronous global system clock that is used for managing and reconfigurating local MAC, PHY, traffic controller components basically. Is this necessary to have this synced when building the dual-board communication? Otherwise, the transceiver reference clock, 156.25 MHz, is used for both Ethernet TX and RX to work. My wonder is should I just make this reference clock synced or I need also to have the system clock synced? Can you help to give an advice? --- Quote End --- Its up to how you want to deploy your system; 1) Synchronous clocks Can be used when you are using the transceivers for custom applications, where you do not have the option to 'bit-slip' to accommodate differences in frequencies between oscillators on different boards. 2) Asynchronous clocks (of the same frequency) This is what most networks use. The clocks on the boards are nominally the same frequency, but they are not exactly. The protocol used over the wire has some 'slack' built in, and the transmit or receive sides have FIFOs for matching data rates. The protocols involve bit-sequences that can be stuffed into the transceiver link, or deleted, as needed to match overall data rates. (1) is simpler to deal with when you are trying to figure stuff out. Cheers, Dave