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Altera_Forum
Honored Contributor
17 years agoHow to assign the VREF pin?
Hi, I use ddr-core v7.2 sp3 in my design. It assigns dq, dqs, dm pins in bank6. I set other ddr pins in bank5. After compilation I check the pin-out file and find that VREF pins of bank6 are set a...
Altera_Forum
Honored Contributor
17 years agoWell, Quartus decides not to use the VREF pins of bank 5. So I would assume that none of the pins of bank 5 use SSTL. Maybe you could check that the pins associated to the DDR memory and located in bank 5 are set to the proper I/O level.