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Altera_Forum
Honored Contributor
Honored Contributorhow to assign clock on a dedicated path
Hi all, I am experiencing clock skews of +3ns in the input to reg path and a skew of -3ns in reg to output path. I got an answer from altera forum only to route the clock through a dedicated...
Altera_ForumHonored Contributor
Honored ContributorHI RYSC
--- Quote Start --- I would strongly recommend a PLL at those speeds. 225Mhz for I/O timing is pretty fast --- Quote End --- You recommended to use a PLL for high frequency operations can you explain me how it makes a difference in skew or slack if we use a PLL instead of a direct clock Thankyou
