Forum Discussion
Altera_Forum
Honored Contributor
14 years agohow to assign clock on a dedicated path
Hi all, I am experiencing clock skews of +3ns in the input to reg path and a skew of -3ns in reg to output path. I got an answer from altera forum only to route the clock through a dedicated...
Altera_Forum
Honored Contributor
14 years agoYes RYSC I followed your reply and yes you are perfectly right as to what you said in this thread. I only know the analysis but the reasons were not known. You mentioned about M20k , I will get information about this ram in altera but just want to have some words from you on this.
Do i have a choice of avoiding this RAM from clock so that the delay is less and yes I will use the PLL inorder to get the timings correct.