how the data is transfered using PCIE LINK

The basic problem is that although PCIe is high bandwidth, it is also high latency.

So if a cpu tries to read a location over PCIe the instruction will stall for a long time - probably in the order of 10us (think ISA bus speeds).

This is the same for an x86 host reading fpga memory, or a nios cpu reading host memory.

Writes can be a little faster since they can be 'posted' (address + data latched and the initiating cycle terminated).

This is not too bad for diagnostics, but horrid for anything that requires any amount of throughput.