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Nobody??? why just no replies....for every post.....
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You're probably not getting any replies because you're jumping into PCIe without actually spending any time to understand what PCI and PCIe is.
Take a look at the document I posted on this thread:
http://www.alteraforum.com/forum/showthread.php?t=35678 Now, to answer a few basic questions for you.
1. A PCIe BAR is a "base address register", its basically a window into the address map of your board. Lets say your board had 4kB of registers that the host needed to access, then the BAR size would be 4kB. The physical address of the BAR in the address map of the RC (the host PC) is determined by the BIOS at boot time. The guy writing the device driver on the host needs to know that address, but that is easy, as the device driver just asks the operating system.
2. A PCIe end-point does not usually use big BARs. Why? Well, a host like a PC does not usually have a DMA controller, and performing reads and writes as 32-bit or 64-bit operations is really efficient ('cause they get packed into serial packets with headers etc). A PCIe end-point usually has a DMA controller, and that DMA controller is what your host device driver programs to move data around, i.e., the host can use a small number of inefficient writes to setup the DMA controller, and then say "go", and the DMA controller will move large volumes of data efficiently.
Writing Linux device drivers for PCIe devices is very simple. In fact, you don't even need a device driver for simple accesses. The thread above has an example program that allows you to read or write from the PCIe BARs.
Cheers,
Dave
Honored Contributor
