How Quartus select which PLL to use?

Hi everyone,

I'm designing a system with a DDR-II controller on an Arria-II GX EP2AGX95 - 780 pins. I used SOPC to design the DDR-II controller.

The DDR-II controller uses a PLL. The crystal clock input to the PLL is in bank-3, most of the DDR-II pins are in bank 3. Pll-4 is associated with bank-3, but instead the memory controller uses PLL-3 which is associated to bank-4.

How can I make sure that my DDR-II controller will always use PLL-3? I ask because I need to use clock output from the PLL for non-DDR-II controller purposes and I would prefer to use dedicated clock outputs. Since dedicated clock ouputs are associated to a specific PLL, I need to be sure that the PLL chosen will not change with the current pinout.

Best regards