Forum Discussion
Altera_Forum
Honored Contributor
15 years agoNo, the VHDL/Verilog operators don't describe sequential behaviour.
Yes, it can be done in one cycle if the operating frequency is low enough. On a Cyclone II, an 18x18 multiplication can run up to 180-260 MHZ, depending on the speed grade. Larger multiplications will either have to run slower or you'll have to divide them into multiple cycles.