Forum Discussion
3 Replies
- Altera_Forum
Honored Contributor
I think, ALTCLKCTRL can be used in all places, where dynamic clock switching is supported by the respective FPGA. It represents the clock multiplexers, that are provided by the hardware. The Stratix IV manual should tell precisely.
- Altera_Forum
Honored Contributor
Thanks. i go through in handbook, This cell should not be limited
- Altera_Forum
Honored Contributor
there is a limit:
--- Quote Start --- Every GCLK and RCLK network has its own clock control block. --- Quote End ---