How increase counter after one second+quartus II

in order to avoid clock issues, the easiest way is incrementing the counter every 50E6 cycles of the 50 MHz clock, this can be achieved using a 26 bits (ceil(log2(50e6-1))) preescaler.

always@(posedge clk_50 or negedge reset_n)
begin
	if(!reset_n)
	begin
		counter_out	<=	0;
		counter_preescaler	<=	0;
	end
	else
	begin
		if(counter_preescaler == 49999999 )
		begin
			counter_out	<=	counter_out+1;
		    counter_preescaler	<=	0;		
		end
		
		else
		
		    counter_preescaler	<=	counter_preescaler+1;		
	end
end