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Altera_Forum's avatar
Altera_Forum
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12 years ago

How generate signal DCLK?

Hi, When the FPGA is power on and the FPGA does not have any internal configuration. Is generated automatic the signal DCLK, to load a configuration from an EPCS? Must I generate it wi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

All signals and interconnections are required as shown in the wiring diagram you attached. All these signals are generated automaitc by the FPGA and EPCS, thus there is no external device required for configuration.