Forum Discussion
Altera_Forum
Honored Contributor
12 years agoHow generate signal DCLK?
Hi, When the FPGA is power on and the FPGA does not have any internal configuration. Is generated automatic the signal DCLK, to load a configuration from an EPCS? Must I generate it wi...
Altera_Forum
Honored Contributor
12 years agoFirst thank you,
I was reading enough and I do not have clearly. If when the fpga is "empty", without programming. Is this signal generated automatic? Or has it to have algun micro embedded for example nios for generate de signal? All that is because I want to load the program on the fpga from an epcs. And make power on from this epcs. Always that I it wants. Without connecting again to the PC. Is it possible this? https://www.alteraforum.com/forum/attachment.php?attachmentid=8653