Forum Discussion
4 Replies
- Altera_Forum
Honored Contributor
I dont think you can. You have to do it via the assignments editor and locate top level pins.
- Altera_Forum
Honored Contributor
I have done it in the past, perhaps with MaxPlusII and not Quartus.
But I think it can be done (if not it should be a added feature). SUBDESIGN clk_divider ( sw0 : input @ y11 ; --y11 ) I know how to use the assignment editor, so I can make it work, just want to make life easier. - Altera_Forum
Honored Contributor
AHDL is no longer being developed and is no longer recommended, so I doubt you will get any new features added.
- Altera_Forum
Honored Contributor
I need to read that Verilog book I purchased 10 years ago.
Turns out it's easy to use the pin assigner to quickly assign pins. Thanks for helping!