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Altera_Forum
Honored Contributor
10 years agoI think the disadvantage is that the rx_out frequency is reduced by half, as it take 1 cycle for 1st 6bits, 1 cycle for 2nd 6bits and then flushed to the core as 12 bits.
I think the disadvantage is that the rx_out frequency is reduced by half, as it take 1 cycle for 1st 6bits, 1 cycle for 2nd 6bits and then flushed to the core as 12 bits.