Honored Contributor
Honored ContributorFirst what is an 6809 ....
http://en.wikipedia.org/wiki/motorola_6809 its an ancient piece of technology that is hardly worth saving. As I see it, your "high-level" task is to replace the CPU board with something that is functionally equivalent at the I/O level. If you had a bunch of spare boards with dead CPUs, then sure, you'd look at replacing the CPUs with a FPGA on an adapter board. However, it sounds like your task is to design a replacement CPU board. Given that requirement, I'm pretty sure a microcontroller would be up to the task, or perhaps an FPGA containing a soft-core processor, eg., NIOS II., and then sure, if you really want to make the new CPU boards code compatible with the old, then you need to have a *cycle accurate* HDL core for the 6809. Why cycle accurate? Well, unless you look at the code, you have no idea if the code has timing delays implemented based on an assumed instruction timing. Where should you start ... Google "6809 fpga" and start browsing ... eg., here's an OpenCore version of the CPU ... http://opencores.org/project,system09 Note that "6809 instruction compatible" does not mean cycle-accurate with respect to the original CPU core. Cheers, Dave
