Forum Discussion
JScho6
Occasional Contributor
7 years agoThat's not entirely true. There's a (quite dirty) way by abusing the differential inputs of the FPGA. Make a resistor-ladder to generate all compare-steps, tie these to the negative input of N differential inputs. Tie all positive inputs together and feed the analogue signal into the FPGA. This is probably the cheapest flash-ADC you can build these days, but it eats up quite a few IOs, which are always scarce (at least in my designs). If you don't need too many bits of resolution, it's worth a try.
I have no personal experience with this approach, but seen it a few times on other designs. I think it's worth a try it for a resolution of 4-5 bits max.
greetings from Germany,
Jens