Forum Discussion
Hello SYiwe,
The reason Intel recommended guideline in pico second (ps) is due to variety of substances used in PCB manufacturing process which might have different trace length which also mentioned by @ak6dn .
Good news for you! I found the older version of the EMIF handbook which apply the board guideline in mils. Refer to this link -->
https://pdfs.semanticscholar.org/7a14/f0cef20b74cb964d728e7c0feca89fd46333.pdf
Routing for address and command routing, Intel recommendations is approximately ± 125 mil (± 3.175 mm) or within ±25ps to each discrete memory component. You may refer to “Layout Considerations For DIMMs and Leveled Components” on page 79 for more information about layout guidelines in above shared link. I also attached below screenshots on both clock , add/cmd routing to ease your viewing.
I summarize the formula ( based on our document) . This is similar as per shared by @ak6dn but I converted it based on our documentation.
125mil = 0.125inch
25ps/0.125inch = 200ps/inch
In short, you can use "200ps/inch" to calculate the delay/length based on your board.
Hope this helps.😊
And thanks @ak6dn for the very useful information 😊
Thanks
Regards,
Aida
Thanks.
I believe the problem is solved.
Regards.