History of interconnects and throughputs

Hmm. I'll try to reword my question.

My question is about the interconnect structure between IP cores within one FPGA.

According to the SOPC builder handbook, the SOPC uses a buffered crossbar to connect the IP cores.

Qsys using a network on chip style to connect IP cores.

What did people use before SOPC builder came around with its buffered crossbar interconnect?

And is there any benchmark as to how fast/better these interconnects are compared to each other? Wherever I look, I find high bandwidth low latency etc.. But no real figures..

Hope its clear.

Cheers

Zubair