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Altera_Forum
Honored Contributor
10 years agoHigh fan-out signal
Hello; After compiling my design in qurtusII, I found this signal "clk~inputclkctrl" have a high fan out. the node"clk" is the clk signal in my design. what can I do to solve this problem. Thank...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- this signal "clk~inputclkctrl" have a high fan out (...) what can I do to solve this problem --- Quote End --- Is this a problem at all ? As far as I know, clocks need to have the ability to drive signal for a large amount of devices.