Forum Discussion
lancewang
New Contributor
2 years agoHigh bit error rate during highspeed data transmission
Use L-Tile/H-Tile Transceiver Native PHY Intel Stratix 10 FPGA IP. The "datapath Options” and Common PMA Options” configurations are shown in the attached pictures.Using PRBS to test the bit error ra...
Kshitij_Intel
Frequent Contributor
2 years agoHi,
Have you tried it? Is the issue resolved?
Thank you,
Kshitij Goel