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my input is a TTL signal: an aleatory pulse of 2.5 V amplitud and between 17 ns and 20 ns duration (the rising time is betwen 800 ps and 1 ns)
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Ok.
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I care for events, when I see one, I have to generate an output with a 3.3 ns duration, the amplitud its not realy important it may be 3.3 V or 2.5 V.
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Why do you need to "see" another pulse? The FPGA could count the pulses if that is what you are interested in.
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I was thinking in sample this input with a 300 MHz clock, (external or generated from pll) because is the duration I need for my output, and its
enough for see the event.
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No, its not.
Given that all you care about are events, you could use the pulse to toggle a signal internal to the FPGA. That toggle signal would stay at a logic high or low between events. Every time the toggle signal toggles is an 'event'. The clock frequency you need to detect events is then determined by the time *between* events, not the time of one pulse.
Read this article here and you will understand what I am talking about
http://www.edn.com/design/systems-design/4333702/crossing-the-abyss-asynchronous-signals-in-a-synchronous-world --- Quote Start ---
It gives me the idea of working asynchronously
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If your pulses are not synchronous, then your system is already asynchronous.
Cheers,
Dave
Honored Contributor
