New Contributorthey are using two FPGA clocks:
50mhz for fpga core
100Mhz for fpga user clock
why do they need to seprated clocks ? cant they use one and use PLL to distribute it ?
i want to use FPGA for input from two cameras, and output to high speed serdes. do i really need two oscillators for it or just one should be enough ?
Regular ContributorHi,
why do they need to seprated clocks ? cant they use one and use PLL to distribute it ?
>>Most of the application runs with 50 MHz which is default.& fpga user clock used for transceiver calibration, If you are not using it you can ground the pin(user clock).
>>If the user clock is not present at device power-up, transceiver calibration will be delayed until the clock is available.
>>We can use same oscillator but here key is FPGA resource.
i want to use FPGA for input from two cameras, and output to high speed serdes. do i really need two oscillators for it or just one should be enough ?
>>Yes, we can use one oscillators however it depend on the design requirements and FPGA resource used.
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Regards
Anand
New Contributorhey thank you ...
actually i need to use the transceiver.
so that means i have to use the user clock ?
if i will use one clock, what is the risk ? lack of driving source ?
or should i use two clocks of redundancy ?
Regular ContributorHi,
Yes, Clock need to be connected to REFCLK_GXB.
You can use PLL input CLK_[bank] [p,n] to distribute clocks for LVDS and FPGA logic.
Regards
Anand
Regular ContributorCheck the PLL user guide and device datasheet for frequency range
New ContributorOK .
THANKS. I HAVE DONE THAT. BUT STILL one last question.
according to user guide: CLKUSER pin is for transceiver calibration (100-125Mhz) also according to guidelines:
"If you are using the CLKUSR pin for configuration and transceiver calibration, you must supply an external free running and stable clock to the CLKUSR pin at start of device
configuration and also when the device entered user mode. If the clock is not present at device power-up, transceiver calibration will be delayed until the clock is available. "
so why have you said to connect the transceiver clock to REFCLK_GXB
or you actually mean the data's clock that entering the transceiver ? and if data is entering on differntial pair (no dedicated clock) ?
Regular ContributorHi,
We have to use dedicated (oscillators) free running clock for CLKUSR.
REFCLK_GXB is data's clock that entering the transceiver from another oscillators.
We can use two oscillators with Any-Frequency clock generator to provide clock for REFCLK_GXB & CLK_[bank] [p,n].
Or
use separate dedicated oscillators.
Regards
Anand
