Forum Discussion
Occasional ContributorHelpless about 1588V2
Regular ContributorHI,
May I know which Ethernet ref design that you are referring here ?
- Any download link or do explain to me how you generate the ref design ?
Typically 1588 feature follow Ethernet IP and has less dependency on FPGA device speedgrade. Since both A10 SOC dev kit and your board are using Arria 10 FPGA, it should work.
Which means the failure is either due to Quartus design issue, board setup issue or board design issue. The good news is you at least have a golden working ref design on A10 SOC dev kit board. You just need to compare and find out the difference that may caused the failure.
- To rule out Quartus design issue
- I presume you use back same ref design without changes to the RTL design ?
- Does the design met Quartus timequest timing closure ?
- Also pls verify the qsf setting particularly on pin location and IO standard setting to match with your own board
- To rule out board setup issue
- Pls double check on FPGA reset, power and clocking
- Your log file shown zero Tx and Rx transaction where I suspect either your design is stuck in reset or clocking is not provided correctly
- Or maybe some FPGA pin location or IO standard is set wrongly
- To rule out board design issue
- Can your board handle 10G data transfer without concern on signal integrity issue ?
- Have you try to use transceiver toolkit to perform loopback testing on your board to verify 10G signal transfer is good on your board first ?
Thanks.
Regards,
dlim
mark_leeHi Deshi ant team
1. The Project "LL10G_1G_10G_LINESIDE_1588v2" is builded Reference the Intel Example "a10soc_322265325_Scalable_Eth1588_BUG2613_Quartus_16.1.0";
2. My Project is working on the Quartus Prime pro 19.2;
3.I have running my project on my board ，"TEST_SMA_LB 0 1 10G " is ok;
4.I have running my project on my board ，"TEST_PHYSERIA_LOOPBACK " is ok;
5.When finish TEST_PHYSERIAL_LOOPBACK , and running“TEST_1588 0 1 10G" right now，sometime frames received is good , "offset ns" and "delay ns" are good , but when runningTEST_1588 again it is receive annything 。
- mark_lee
Hi Deshi ant team
In addition:
1. "TEST_SMA_LB 0 10 G 5000 " and "TEST_PHYSERIAL_LOOPBACK "1 10G 5000" are ok, message is :
(1)
% TEST_SMA_LB 0 10G 5000
CONFIGURE CHANNEL 0
configure_to_10G
setting up mac with a basic working config
setting 0xC5C4 into rxmac primary address Reg-1
setting 0xC3C2C1C0 into rxmac primary address Reg-0
enabling: pad and crc stripping in rx mac
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
clearing mac stats registers
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
Configure TOD Master
Configure TOD 10G
Disabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000000
Select std ethernet traffic controller
Disable Avalon ST Loopback
====================================================================================
B E G I N C O N F I G U R A T I O N
====================================================================================
payload length = fixed ....
payload bytes = fixed incremental bytes ....
burst size = 5000 ....
payload length = 100 ....
frame source addres field = F0F1F2F3F4F5 ....
frame destination addres field = C5C4C3C2C1C0 ....
reseting monitor Packet Counters
number of Packets Expected By Monitor = 0x1388
burst being injected into device ....
-- MONITOR processing frames received .....
-- MONITOR Received Packet# 5000]-- DONE! - monitor received all expected sum of packets .....
_________________________________________________________________________________________________________________________
-- (MONITOR) GOOD PKTS RECEIVED = 5000
-- (MONITOR) BAD PKTS RECEIVED = 0
-- (MONITOR) BYTES RECEIVED = 479992
-- (MONITOR) CYCLES USED = 75002
-- (MONITOR) THROUGHPUT CALCULATED = 8.00 Gbps
-- (MONITOR) RXBYTECNT_LO32 = 479992
-- (MONITOR) RXBYTECNT_HI32 = 0
-- (MONITOR) RXCYCLCNT_LO32 = 75002
-- (MONITOR) RXCYCLCNT_HI32 = 0
_________________________________________________________________________________________________________________________===================================================================
| MAC TX STATS REGISTER CHECK
===================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 5000
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 5000
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 410000
|# COMPREHENSICE_OCTETS_RECEIVED = 500000
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 5000
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
======================================================================
| MAC RX STATS REGISTER CHECK
======================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 5000
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 5000
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 410000
|# COMPREHENSICE_OCTETS_RECEIVED = 500000
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 5000
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
|# FRAMES_BETWEEN_SIZE_ABOVE1519_BYTES = 0(2)
% TEST_PHYSERIAL_LOOPBACK 1 10G 5000
CONFIGURE CHANNEL 1
configure_to_10G
setting up mac with a basic working config
setting 0xC5C4 into rxmac primary address Reg-1
setting 0xC3C2C1C0 into rxmac primary address Reg-0
enabling: pad and crc stripping in rx mac
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
clearing mac stats registers
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
Configure TOD Master
Configure TOD 10G
Disabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000000
Enabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000001
Select std ethernet traffic controller
Disable Avalon ST Loopback
====================================================================================
B E G I N C O N F I G U R A T I O N
====================================================================================
payload length = fixed ....
payload bytes = fixed incremental bytes ....
burst size = 5000 ....
payload length = 100 ....
frame source addres field = F0F1F2F3F4F5 ....
frame destination addres field = C5C4C3C2C1C0 ....
reseting monitor Packet Counters
number of Packets Expected By Monitor = 0x1388
burst being injected into device ....
-- MONITOR processing frames received .....
-- MONITOR Received Packet# 5000]-- DONE! - monitor received all expected sum of packets .....
_________________________________________________________________________________________________________________________
-- (MONITOR) GOOD PKTS RECEIVED = 5000
-- (MONITOR) BAD PKTS RECEIVED = 0
-- (MONITOR) BYTES RECEIVED = 479992
-- (MONITOR) CYCLES USED = 75002
-- (MONITOR) THROUGHPUT CALCULATED = 8.00 Gbps
-- (MONITOR) RXBYTECNT_LO32 = 479992
-- (MONITOR) RXBYTECNT_HI32 = 0
-- (MONITOR) RXCYCLCNT_LO32 = 75002
-- (MONITOR) RXCYCLCNT_HI32 = 0
_________________________________________________________________________________________________________________________===================================================================
| MAC TX STATS REGISTER CHECK
===================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 5000
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 5000
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 410000
|# COMPREHENSICE_OCTETS_RECEIVED = 500000
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 5000
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
======================================================================
| MAC RX STATS REGISTER CHECK
======================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 5000
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 5000
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 410000
|# COMPREHENSICE_OCTETS_RECEIVED = 500000
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 5000
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
|# FRAMES_BETWEEN_SIZE_ABOVE1519_BYTES = 0- mark_lee
Hi Deshi ant team
1. I do some test forward the step :
(1) "TEST_PHYSERIAL_LOOPBACK 1 10G 5000” ，is OK
(2) “TEST_1588 0 1 10G ” is OK
(3) "TEST_1588 0 1 10G" again, is not OK
2. The console system print message is :
% TEST_PHYSERIAL_LOOPBACK 1 10G 5000
CONFIGURE CHANNEL 1
configure_to_10G
setting up mac with a basic working config
setting 0xC5C4 into rxmac primary address Reg-1
setting 0xC3C2C1C0 into rxmac primary address Reg-0
enabling: pad and crc stripping in rx mac
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
clearing mac stats registers
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
Configure TOD Master
Configure TOD 10G
Disabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000000
Enabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000001
Select std ethernet traffic controller
Disable Avalon ST Loopback
====================================================================================
B E G I N C O N F I G U R A T I O N
====================================================================================
payload length = fixed ....
payload bytes = fixed incremental bytes ....
burst size = 5000 ....
payload length = 100 ....
frame source addres field = F0F1F2F3F4F5 ....
frame destination addres field = C5C4C3C2C1C0 ....
reseting monitor Packet Counters
number of Packets Expected By Monitor = 0x1388
burst being injected into device ....
-- MONITOR processing frames received .....
-- MONITOR Received Packet# 5000]-- DONE! - monitor received all expected sum of packets .....
_________________________________________________________________________________________________________________________
-- (MONITOR) GOOD PKTS RECEIVED = 5000
-- (MONITOR) BAD PKTS RECEIVED = 0
-- (MONITOR) BYTES RECEIVED = 479992
-- (MONITOR) CYCLES USED = 75002
-- (MONITOR) THROUGHPUT CALCULATED = 8.00 Gbps
-- (MONITOR) RXBYTECNT_LO32 = 479992
-- (MONITOR) RXBYTECNT_HI32 = 0
-- (MONITOR) RXCYCLCNT_LO32 = 75002
-- (MONITOR) RXCYCLCNT_HI32 = 0
_________________________________________________________________________________________________________________________===================================================================
| MAC TX STATS REGISTER CHECK
===================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 5000
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 5000
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 410000
|# COMPREHENSICE_OCTETS_RECEIVED = 500000
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 5000
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
======================================================================
| MAC RX STATS REGISTER CHECK
======================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 5000
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 5000
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 410000
|# COMPREHENSICE_OCTETS_RECEIVED = 500000
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 5000
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
|# FRAMES_BETWEEN_SIZE_ABOVE1519_BYTES = 0% TEST_1588 0 1 10G
CONFIGURE CHANNEL 0 as master
configure_to_10G
setting up mac with a basic working config
setting 0xC5C4 into rxmac primary address Reg-1
setting 0xC3C2C1C0 into rxmac primary address Reg-0
enabling: pad and crc stripping in rx mac
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
clearing mac stats registers
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
Configure TOD Master
Configure TOD 10G
Disabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000000
CONFIGURE CHANNEL 1 as slave
configure_to_10G
setting up mac with a basic working config
setting 0xC5C4 into rxmac primary address Reg-1
setting 0xC3C2C1C0 into rxmac primary address Reg-0
enabling: pad and crc stripping in rx mac
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
clearing mac stats registers
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
Configure TOD Master
Configure TOD 10G
Disabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000000
Select 1588 traffic controller
Start TOD synchronization
Master 1588 start 1 step operation
TRAFFIC_CONTROLLER_BASE_ADDR: 0x100000
Waiting capturing offset delay ...
-- Break
Start capturing offset delay ...
Reset Master 1588 start 1 step operation
Reset Start TOD synchronization
delay ns = 0x00000030
delay fns = 0x00007197
offset ns = 0x00000000
offset fns = 0x00000000
===================================================================
| MAC TX STATS REGISTER CHECK
===================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 9120026
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 9120026
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 456001300
|# COMPREHENSICE_OCTETS_RECEIVED = 620161768
|# FRAMES_WITH_SIZE_64_BYTES = 4560013
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 4560013
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
======================================================================
| MAC RX STATS REGISTER CHECK
======================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 4560013
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 4560013
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 209760598
|# COMPREHENSICE_OCTETS_RECEIVED = 291840832
|# FRAMES_WITH_SIZE_64_BYTES = 4560013
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 0
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
|# FRAMES_BETWEEN_SIZE_ABOVE1519_BYTES = 0
===================================================================
| MAC TX STATS REGISTER CHECK
===================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 4560013
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 4560013
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 209760598
|# COMPREHENSICE_OCTETS_RECEIVED = 291840832
|# FRAMES_WITH_SIZE_64_BYTES = 4560013
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 0
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
======================================================================
| MAC RX STATS REGISTER CHECK
======================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 9120026
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 9120026
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 456001300
|# COMPREHENSICE_OCTETS_RECEIVED = 620161768
|# FRAMES_WITH_SIZE_64_BYTES = 4560013
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 4560013
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
|# FRAMES_BETWEEN_SIZE_ABOVE1519_BYTES = 0% TEST_1588 0 1 10G
CONFIGURE CHANNEL 0 as master
configure_to_10G
setting up mac with a basic working config
setting 0xC5C4 into rxmac primary address Reg-1
setting 0xC3C2C1C0 into rxmac primary address Reg-0
enabling: pad and crc stripping in rx mac
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
clearing mac stats registers
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
Configure TOD Master
Configure TOD 10G
Disabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000000
CONFIGURE CHANNEL 1 as slave
configure_to_10G
setting up mac with a basic working config
setting 0xC5C4 into rxmac primary address Reg-1
setting 0xC3C2C1C0 into rxmac primary address Reg-0
enabling: pad and crc stripping in rx mac
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
clearing mac stats registers
testing Configure Period and Adjustment RX XGMII TSU
Configure Period and Adjustment TX XGMII TSU
Configure TOD Master
Configure TOD 10G
Disabling serial PMA Loopback (local)
Read back Serial PMA loopback register = 0x00000000
Select 1588 traffic controller
Start TOD synchronization
Master 1588 start 1 step operation
TRAFFIC_CONTROLLER_BASE_ADDR: 0x100000
Waiting capturing offset delay ...
-- Break
Start capturing offset delay ...
Reset Master 1588 start 1 step operation
Reset Start TOD synchronization
delay ns = 0x00000030
delay fns = 0x00007197
offset ns = 0x00000000
offset fns = 0x00000000
===================================================================
| MAC TX STATS REGISTER CHECK
===================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 0
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 0
|# COMPREHENSICE_OCTETS_RECEIVED = 0
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 0
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
======================================================================
| MAC RX STATS REGISTER CHECK
======================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 0
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 0
|# COMPREHENSICE_OCTETS_RECEIVED = 0
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 0
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
|# FRAMES_BETWEEN_SIZE_ABOVE1519_BYTES = 0
===================================================================
| MAC TX STATS REGISTER CHECK
===================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 0
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 0
|# COMPREHENSICE_OCTETS_RECEIVED = 0
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 0
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
======================================================================
| MAC RX STATS REGISTER CHECK
======================================================================
|# FRAMES_RECEIVED_WITH_ERROR = 0
|# UNICAST_FRAMES_WITH_ERROR = 0
|# MULTICAST_FRAMES_RECEIVED_WITH_ERROR = 0
|# BRDCAST_FRAMES_WITH_ERROR = 0
|# FRAMES_RECEIVED_WITH_ONLY_CRCERROR = 0
|# VALID_LENGTH_FRAMES_WITH_CRC_ERROR = 0
|# JABBER_FRAMES = 0
|# FRAGMENTED_FRAMES = 0
|# INVALID_FRAMES_RECEIVED = 0
|# FRAMES_RECEIVED_GOOD = 0
|# PAUSE_FRAMES_RECEIVED = 0
|# UNICAST_CONTROL_FRAMES = 0
|# MULTICAST_CONTROL_FRAMES = 0
|# UNICAST_FRAMES_RECEIVED_GOOD = 0
|# MULTICAST_FRAMES_RECEIVED_GOOD = 0
|# BRDCAST_FRAMES_GOOD = 0
|# DATA_AND_PADDING_OCTETS_RECEIVED_GOOD= 0
|# COMPREHENSICE_OCTETS_RECEIVED = 0
|# FRAMES_WITH_SIZE_64_BYTES = 0
|# FRAMES_BETWEEN_SIZE_64AND127_BYTES = 0
|# FRAMES_BETWEEN_SIZE_128AND255_BYTES = 0
|# FRAMES_BETWEEN_SIZE_256AND511_BYTES = 0
|# FRAMES_BETWEEN_SIZE_512AND1K_BYTES = 0
|# FRAMES_BETWEEN_SIZE_1KND1518_BYTES = 0
|# FRAMES_BETWEEN_SIZE_ABOVE1519_BYTES = 0
