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Altera_Forum's avatar
Altera_Forum
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14 years ago

Help with metastability problem

Hi, I'm working on a vision processing based project at uni using a custom board built around a cyclone III and I am having to modify some vhdl code written by previous years students. A met...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Timing analysis is the way to find out about violations.

I see that you are trying to operate counters based on latches (in an asynchronous process). This can't work and Quartus will be surely issuing a number of warnings related to the construct. 

addr <= addr + 1;
count <= count + 1;

So there are apparently more basic problems than possible timing violations.