Help with making an osciloscope on NIOS II

I would go as far as saying create your own component to interface with the ADC that writes to the FIFO and then connect any of the DMA blocks you care to use to the read side of the FIFO.

If you want to get there with only off the shelf blocks and are less concerned with resource utilization, as Cris72 mentioned, you probably want something like (PIO->DMA1->DCFIFO->DMA2->SDRAM). DMA1 runs at your sampling rate. DMA2 runs at SDRAM interface frequency.