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Honored Contributor
Honored ContributorHelp with FPGA correlator
Hi everyone, I'm new to FPGA design, and just find out this is the best place for seeking help as well as gaining experience. I'm designing an FPGA cross-correlator which correlates 8 bits data...
Altera_ForumHonored Contributor
Honored Contributor If your correlator operates enough slow to support a sequential solution, as suggested by orchestra director, you must design a FSM that controls the mac (multiply accumulate) for all correlator 66 taps. The question is? How much long colud be your sampling period, in order to achieve a good correlator response? In case that you need a parallel solution, Look for the Transpose-form FIR filter structure.
