help on burst transfer with DMA

Hi Socrates,

Thanks for your reply. I realized that my setting of DMA length register width should be 9 instead of 10 in this case, since 128 words burst size = 2^9 bytes.

If I set register width to be 9, then the phenomenon I described before will not show up because the program will report error if the data length I ask it to transfer is over the limit.

I am just curious that when those two settings are not compatible, the program can send out data stream with length in between....

And could you tell more about the transfer time variable? Is it the characteristics of the SRAM in use here? There is no time setting for DMA...

Thanks.