Help for counter programme

this is what i have so far .

library ieee;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

entity mini is

port ( en, m_reset, UP_DW, clk : in std_logic;

q : out std_logic_vector (3 downto 0));

end mini;

architecture flow of mini is

signal count_sig :unsigned (3 downto 0);

begin

process ( en, m_reset, UP_DW, clk )

begin

if (en = '1' and m_reset = '1')

then

count_sig <= "0000";

elsif(en = '0' and m_reset = '1')

then

count_sig <="0000";

elsif falling_edge (clk) and UP_DW = '0'

then

count_sig <= count_sig +1;

elsif falling_edge (clk) and UP_DW = '1'

then

count_sig <= count_sig -1;

end if;

end process;

q <= std_logic_vector (count_sig);

end flow;

how to make the altera board show hex from " A to F " ??