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Hi , you can try CASE statement in VHDL or Verilog, and you can consider AHDL truth_table.
if you insist on schematic consider it as long way.
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I apologize I should of mentioned that I haven't learned what that is yet, this all seems like french to me. The directions I have say to realize the CSOP expressions for the divider circuit outputs using MSI decoders or multiplexers and any additional SSI logic needed. Use as few MSI devices and as few additional SSI devices as possible.
And I understand what decoders are and multiplexers but I just cant seem to comprehend how to do what its asking for.
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