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Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- Implementation). One of challenges is that HDMI needs up to 10.6 Gbps bitrate @ 350 MHz while Cyclone III can achieve up to 875 Mbps (in their high-speed I/O banks). --- Quote End --- The HDMI 1.3 spec has a maximum clock rate of 340 MHz with 3 data channels and 10 bits per channel, that gives you 10.2 Gbps. But that is at the highest resolution. If your maximum resolution is 720p, your clock will be 74.25 MHz for a total of 2.23 Gbps transfer, or 742.5 Mbps per lane. This is doable in the Cyclone 3. --- Quote Start --- - Is it theoretically possible to send such streams without any compression if I am using TMDS protocol? --- Quote End --- Yes --- Quote Start --- - Can I just use a DVI Tx in my board, then somehow do a DVI2HDMI conversion? --- Quote End --- Yes. There are DVI to HDMI cables readily available online DVI just doesn't have the sound and advanced features of HDMI.. --- Quote Start --- - Is it possible to use Cyclone´III high-speed I/O banks (primarily designed for differential interfaces like LVDS) for HDMI Tx interface? Are there any electrical constraints? (As you have already noticed I don't need to achieve the HDMI max bitrate, I can survive with much less than that) --- Quote End --- You should be able to make it work at 720p. I haven't looked into the other electrical constraints to say for sure however. --- Quote Start --- - Do I need to have an IP core for TMDS encoding? If so, does Altera provide it? --- Quote End --- Yes you need a TDMS encoder, I'm not aware of any Altera core for this, but they do have some image processing cores, so I wouldn't be surprised if they have one. However the specification is available: http://www.ddwg.org/lib/dvi_10.pdf so it wouldn't be too hard to create it if you need it. --- Quote Start --- - Is there any other aspect I have to consider? --- Quote End --- Synchronization between clock domains and making sure your clocks/pll's are setup correctly are always concerns. .If you can get it running in a dev board before you spin your board, I'm a FPGA/ASIC consultant with video and RF DSP experience, so if you need assistance implementing the design, we can help you out. We also have board design and software engineers on staff. If you are interested feel free to message me through this forum. Regards, Pete