Forum Discussion

İrfan's avatar
İrfan
Icon for New Contributor rankNew Contributor
7 years ago

HDL Workflow Advisor

Hi all , My name is İrfan. I am new to Simulink and Altera blocks. I want to write the systems I use first. 1) Altera cyclone IV E (EP4CE6E22C8N) 2) Matlab R2015a and R2017b 3) Quartus II Web E...
İrfan's avatar
İrfan
Icon for New Contributor rankNew Contributor
7 years ago

Now there is a different problem. Using the "FPGA Turnkey" I define the led with a 4-bit width in the "Turnkey I / O" tab. However, the error appears. When I compile and synthesize the .sof project file created by Matlab in Quartus, there is no problem.

I need your help on this one,

Error (image)

İrfan's avatar
İrfan
Icon for New Contributor rankNew Contributor
7 years ago

Update_2 : I've solved this problem by changing the value of the JTAG chain position.