Your code works (unchanged) on my DE2-115. So, I think you need to look at for something else wrong in your project settings.
However, whilst we're here, a few comments on your code. You are loading registers GPIO[31:1] with 'z'. Ask yourself whether a register (a real one, in a device) can be loaded with a 'z'. How Quartus (or other vendor tools) interprets your statement may not be well defined. So, different tools may produce different results - not a good thing. As you will see from the compilation report the number of registers used for your design is 1, even though you've declared and inferred 36 in your code.
Loading registers with 'z' can be a useful tool when simulating - it allows you to follow a particular path through a design - very useful for fault finding. However, a real register, in a device, can only be loaded with a '0' or '1'.
Secondly, a minor point, you've declared GPIO[35:0] in your port list but only coded for GPIO[31:0]. GPIO[35:32] are left wanting...
I suggest you trim (tidy) your code to this:
module dswitch (SW,CLOCK_50,GPIO);
input wire SW;
input wire CLOCK_50;
output reg GPIO;
always @(posedge CLOCK_50)
begin
if(SW==1)
GPIO=1'b1;
else
GPIO=1'b0;
end
endmodule
...or if you must tri-state the remaining GPIO...
module dswitch (SW,CLOCK_50,GPIO);
input wire SW;
input wire CLOCK_50;
output wire GPIO;
reg GPIO_reg;
always @(posedge CLOCK_50)
begin
if(SW==1)
GPIO_reg=1'b1;
else
GPIO_reg=1'b0;
end
assign GPIO=GPIO_reg;
assign GPIO=35'hz;
endmodule
Cheers,
Alex