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Altera_Forum
Honored Contributor
12 years agoPeople discount bare metal development, but anything that needs higher levels of certification won't be using Linux so far as I've been able to tell. Lot of cars and planes out there to casually dismiss the bare metal market... Not to mention medical devices, factory/robot automation controls, etc.
I'm somewhat in your position. I'm a software guy that needs to look into the FPGA end. I haven't seen anything special about ARM that would make it harder to do bare metal development than any other modern chip. Not simple but certainly doable. The software documented in C:\altera\13.1\embedded\altera\hps\altera_hps\doc would be a good place to start. Also look in the Altera EDS documentation. The ARM interfaces to the FPGA over AXI 3. Altera provides IP which will can convert it to the Avalon bus used in Nios. I've decided to use Avalon because it looks simpler than AXI. See the Avalon bus specification for details. I'm planning to create a component in QSYS with a slave Avalon interface. I'm currently trying to write some Verilog code to talk to the ARM. You assign pins to your FPGA with a sdc file. There are plenty of examples for that. Don't restrict yourself to looking at the Helios board only. I've been writing my code and FPGA images to an SD card. The preloader programs the FPGA at power on, then runs my ARM code. Lots of examples on how to do this too.