Generating a signal with noise

Hi dave i implemented division in my code but its not working as it must can you tell me if my implementation is correct or not

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE IEEE.NUMERIC_STD.ALL;

--USE IEEE.NUMERIC_BIT.ALL;

USE IEEE.STD_LOGIC_SIGNED.ALL;

--USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY random IS ------> Interface

GENERIC (n : INTEGER := 16); -- Input bit width

PORT( clk : IN STD_LOGIC;

random_num : OUT STD_LOGIC_VECTOR(n-1 DOWNTO 0);

x : OUT STD_LOGIC_VECTOR(n-1 DOWNTO 0);

random_mean: OUT STD_LOGIC_VECTOR(n-1 DOWNTO 0);

random_sum: OUT STD_LOGIC_VECTOR(n-1 DOWNTO 0)

);

END random;

ARCHITECTURE Behavioral of random is

SHARED VARIABLE sum : STD_LOGIC_VECTOR(n-1 DOWNTO 0) :=( OTHERS => '0');

SHARED VARIABLE rand_temp : STD_LOGIC_VECTOR(n-1 DOWNTO 0) := (n-1 => '1' , OTHERS => '0');

SHARED VARIABLE count,count1: STD_LOGIC_VECTOR(n-1 DOWNTO 0) :=( OTHERS => '0');

SIGNAL adi : STD_LOGIC_VECTOR(n-1 DOWNTO 0);

SIGNAL sita : INTEGER RANGE 0 TO 2**n-1;

SIGNAL count2,sum1 : INTEGER RANGE 0 TO 2**n-1;

BEGIN

PROCESS(clk)

VARIABLE temp : STD_LOGIC := '0';

BEGIN

IF(RISING_EDGE(clk)) THEN

temp := rand_temp(n-1) XOR rand_temp(n-2);

rand_temp(n-1 DOWNTO 1) := rand_temp(n-2 DOWNTO 0);

rand_temp(0) := temp;

END IF;

random_num <= rand_temp;

END PROCESS;

PROCESS

BEGIN

WAIT UNTIL clk = '1';

sum := sum + rand_temp;

count := STD_LOGIC_VECTOR(UNSIGNED(count) + 1);

FOR I IN 0 TO n-1 LOOP

count1(I) := count(n-1-I);

END LOOP;

count2 <= TO_INTEGER( UNSIGNED(count1));

sum1 <= TO_INTEGER(UNSIGNED(sum));

sita <= sum1 / count2;

adi <= STD_LOGIC_VECTOR(TO_UNSIGNED(sita,16));

END PROCESS;

x <= count1;

random_sum <= sum;

random_mean <= adi;

END;

Regards

Adi