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Ok, I will switch my platform from CPLD to FPGA. And I prefer to have USB as the interface input string from laptop. Ecexpt DE0 board, what Kinds of hardware or IPs I should prepare to implement the test pattern generator?
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Provide a better description on what the patterns are supposed to be and we can provide a better answer. For example, do you have hundreds of individual bits/wires that you need to generate patterns on, are the patterns all the same, what frequency do you need to generate the patterns at?
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My target: To have simple access to MCUs, in which, most of them are ARM based.
1. Enter some low power modes of MCUs
2. Access to their embflash memory, however, simple access would be enough.
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The ARM MCUs already come with these features, why do you need an FPGA?
Cheers,
Dave
Honored Contributor
