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You must specify what do you mean for medium size: tens of bits, hundreds, thousands?
The optimal solution is different in these cases.
I dare say that for a pattern less than 100bits long which needs to be changed occasionally you can simply use a CPLD and the shift register solution.
Usually the shift register blocks (I refer now to lpm_shiftreg) have a LOAD input which loads all data from a parallel port and/or a SHIFTIN input to load serially.
For each clock edge, stored data is sent serially out of a SHIFTOUT port, and this is the pattern you want to generate.
Parallel load is not convenient in your case; discard it and connect all other shiftreg input ports to external controls (push buttons, PLC or microcontroller outputs): you can do everything with these few signals.
PLease note that minimal extra logic inside CPLD may be required if you need the pattern to be generated under particular conditions.
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Chris,
1. It might be hundreds of bits for a input string.
2. Is it must to use external controls (push buttons, PLC or MCU outputs)? Can I input the string simply from the master (laptop)?
Thanks!
Honored Contributor
