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Altera_Forum
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14 years ago

Generate patterns through CPLD(MAXII)?

I'm new to FPGA/CPLD. Could any one help me? I'm wondering if I can use CPLD/FPGA to generate some patterns to output pins? This is for some simple test purpose. For example, under 50MHz clo...
Altera_Forum's avatar
Altera_Forum
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14 years ago

I mean the DE0 platform with followings. Will this be enough for test pattern generator?

Cyclone III EP3C16F484 with ~16,000 LEs

8MB SDRAM and 4MB Flash

USB Blaster onboard