Functional simulation vs Timing

dont use buffer type on a port map. No one uses them. Only use in or out (or inout only for top level ports).

Use internal signals for storage instead.

A potential problem I see is the assignment to C. because you have it outside of the clock its unlikely to behave properly. Keep all assingments in a clocked process inside the clocked part. This may also be why x does nothing - you're evaluating it outside of the clock - the synthsiser may have just thrown it away.

Its best to keep to the standard templates.