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Altera_Forum
Honored Contributor
13 years agoFunction of MSEL pins in FPGA
Dear sir, I would like to know, the function of MSEL[2:0] pins on Cyclone-IV. What will they decide ? Will they decide the mode in which the FPGA is getting configured ? Or the ...
Altera_Forum
Honored Contributor
13 years agoHi,
if you're design is using 3.3V VCCIO for bank1 and you want to configure the device via Active Serial, the correct configuration is line 3, MSEL2..0 = 010 as you already wrote. I assume your design is like Figure 8-6 "in system programming of serial configuration devices". Note(1) gives you the pull-up voltages to be 3.3VDC Note(4) references the defnitions for MSEL to be observed with 8-5 for the Cyclone IV E while a logic '1' is a connection to VCCA (which is the PLL analog voltage required anyhow) Regards