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Hi JP,
Sure. I'm in the process of writing a MATLAB .mex interface to the binary version of the protocol, which will allow the highest performance. Once I get that working, I was going to update the documentation, and make sure the _hw.tcl files worked independently of my revision system, eg., an unzipped version of the library could be used directly.
If you want to use the current version of the code ASAP, just email me and I'll send you the code. If you want to wait until next week, I should have the code updated and documented. At that point, I'll post the code here, or on the Altera Wiki for all to use.
Cheers,
Dave
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Dear Dave Hawkins,
let me first introduce myself.
I am Michele Ricci, a master degree student in electronic engineering at Politecnico di MIlano. I am currently working on my master thesis and one of my tasks is to interface a spartan6 with a FT232H chip in a 245 synchronous style. I' ve found on a altera forum a thread about this topic and i've seen the notes that you posted about it. I was wondering if you mind sharing with me your vhdl/verilog code for the communication (basically the blocks described at page 24 of your notes), that could really make my work easier and, most of all, faster.
Thank you in advance if you accept to do this, if not i must however thank you for the notes , wich i' ve found extremely detailed and clear.
Best Regards,
MIchele Ricci
Honored Contributor
