fsm debuging

thanks for your replay

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Better yet, have someone else do it (independent verification).

Jerry

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well I have no one to check my design because I started to learn VHDL a few months ago by writing codes to a project I am doing and the people here help me a lot with every question I didn't succeeded on solving by myself , with a book or with Google.

should I look in the component for the problem or in the fsm ... has i said before and your answer strengthen my believe that the problem is at the component and not in the fsm because when I put everything in one file it's working ( most of it any way I will solve the rest later on)