Altera_ForumHonored Contributor8 years agoFSM Caught in impossible State Hey all, So I've been developing an FPGA (Cyclone 3 Series) that basically sits between an FX3 USB 3 micro-controller and the HPI interface of a DSP. My problem lies withing my FSM, that is res...Show More
Altera_ForumHonored Contributor8 years agoActually yes - it would need to be high for 2 clocks to work properly.
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