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Your screenshots are extremely hard to read. From what I can decipher in the sopc shot, the CPU clock is 50MHz. Does it show 100MHz in the clock list when you change the setting in the pll component?
In the RTL view you should find the pll inside the sopc block, several levels down in the hierarchy.
You have lots of printf's in your code. This is typically an I/O operation than will take some time, even with a fast CPU. You should have a loop without any I/O between your two clock() calls if you really want to see a difference with a faster clock.
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Sorry for the quality of the screen. I attached the same screen in compressed folder.
How you after you decipher you say that the clock is 50 Mhz, if you see in the new screen, that the cpu clock is related to the sys_clk. And the sys_clk is an output from the pll.
Of course he show to me 150 Mhz in the clock list, you can check this from the screen of the SOPC. the PLL output also have as value 150Mhz.
In RTl schematic, i find just pll_125, this last don't related to clock CPU.
You have reason about the printf instruction, i note Daixiwen that i don't need for this. I add the printf instruction to see the result and to increase the execution time to appear the difference when i make some modifcation. You know that when i delete the printf instruction always i obtained 0 as execution time.
If there are a method to calculte the clock cycle or to appear the execution time in micro-second, really i will be happy to discover :).
Think you Daixiwen
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